The present invention relates to semiconductor devices, and more particularly to a semiconductor integrated circuit device technique that is effectively applicable to a MOSFET device.
In Japanese Unexamined Patent Publication No. 2006-202931 (Patent Document 1) or U.S. Patent Application Publication No. 2006-157779 (Patent Document 2) corresponding thereto, there is disclosed an n-channel MOSFET wherein a field plate electrode is disposed under an ordinary trench gate electrode.